A. Field of the Invention
The present invention relates to a method and circuit for biasing transistors to increase performance. The disclosed method and circuit are applicable to boosting performance of a critical path in a larger circuit upon the occurrence of a triggering event.
B. Description of the Related Art
Due to the so-called body effect, which is known to those skilled in the integrated-circuit art, the threshold voltage V.sub.T of a transistor, for example a metal oxide semiconductor field effect transistor (MOSFET), can be modified by applying a bias voltage to the substrate. For example, a negative substrate bias relative to a source terminal raises the threshold voltage of an n-type MOSFET (NMOSFET) by reverse-biasing the source-substrate junction, while a slightly positive substrate bias relative to a source terminal reduces the threshold voltage of an NMOSFET by forward-biasing the source-substrate junction. Such biasing of opposite polarities is equally applicable to p-type MOSFETs (PMOSFET) as well, as will be appreciated by those in the integrated circuit art. The change in the threshold voltage V.sub.T is typically less than the absolute value of the substrate bias for transistors biased in such a manner. Depending on the structure of the transistor in question, the substrate may also be referred to as the body or replaced by the well of the transistor.
Since I.sub.ON, the turned-on saturation current of a MOSFET, is proportional to (V.sub.DD -V.sub.T).sup.2, where V.sub.DD is the drain voltage, a reduction in V.sub.T is highly effective in boosting I.sub.ON which improves circuit speed. This way of increasing transistor speed is especially useful in low-voltage circuits, for example where V.sub.DD is 1.5 volts or less. A drawback to forward-biasing the source-body junction to lower V.sub.T is a greater leakage current through the junction.
FIG. 1 shows a conventional way of lowering V.sub.T in an NMOSFET 10 having a source 20 tied to ground. A p-type body 30 is biased with a body voltage V.sub.b derived from a gate 40. A drain 50 is connected to V.sub.DD (not shown). Though a wire is shown connecting the gate and body in FIG. 1, depending on the desired level for V.sub.T, a voltage divider (not shown) may also be used between the gate and body to generate the desired body voltage V.sub.b. In any event, V.sub.b is conventionally generated from the voltages already available on the chip, such as the gate voltage or V.sub.DD.
Also known is a method of accelerating processing in a circuit path using the above conventional transistor biasing. Normally, the circuit path is known and consists of a number of transistors, gates or chips. As explained above, biased transistors have an associated leakage current, and thus use more power than necessary. Therefore, it is good design practice only to bias the transistors for speed when speed is actually needed. Typically, a sensing circuit senses when a signal is propagating toward the circuit path. This sensing circuit will trigger a switching circuit to forward-bias the transistors in the circuit path for maximum performance when the propagating signal arrives.
FIG. 2 illustrates a circuit layout for accomplishing the above-described conventional scheme. A circuit 60 includes a plurality of transistors T.sub.1 to T.sub.N, whose sources are all tied to V.sub.SS (ground). The respective bodies of transistors T.sub.1 to T.sub.N are tied to a common line emanating from a switching circuit 70. This switching circuit switches the common line between V.sub.SS and a bias potential V.sub.b generated by a bias potential generation circuit 80. In FIG. 2, where the transistors are n-type and V.sub.SS is ground, V.sub.b would be a positive voltage in order to forward bias the source-body junction. Switching circuit 70 is controlled by standby detection circuit 90, which is triggered by some event to switch the transistors T.sub.1 to T.sub.N out of standby mode (V.sub.SS applied), and into a biased state in preparation for signal propagation.